June 23, 2025

Round-up

Highlights

1. Washington tightens the screws again. A State Department official says Hangzhou-based DeepSeek secretly tapped banned Nvidia H100 GPUs for military AI work, underscoring a coming wave of enforcement actions¹ (reuters.com).
2. Silicon-carbide pioneer Wolfspeed files for Chapter 11. The $6.5 billion debt-for-equity deal nearly wipes out shareholders and puts EV power-device supply at risk² (ft.com).
3. Intel questions ASML’s High-NA EUV payoff. An internal memo suggests the marquee tool will serve fewer layers than once thought, complicating foundry cap-ex plans³ (trendforce.com).

Other developments: Snowcap Compute’s $23 million superconducting-AI round⁴; TSMC margin worries as U.S. waiver revocation looms⁵; Bloomberg tip that U.S. may yank allies’ China fab exemptions⁶; Continental spins up its own chip design unit with GlobalFoundries⁷; SEALSQ rolls out quantum yield-boost scheme for sub-7 nm wafers⁸; STMicro widens buybacks⁹; Montage Technology preps $1 billion Hong Kong IPO¹⁰; Nvidia books all of Wistron’s new AI-server capacity through 2026¹¹.

Did You Know? Snowcap claims its niobium-titanium-nitride superconducting logic can deliver 25 × better performance-per-watt—even after factoring in cryo-cooling overhead⁴ (reuters.com).

In-depth

1 | Government & Corporate Policy

• DeepSeek export-control probe¹ (reuters.com)

  • U.S. officials allege shell-company work-arounds to acquire H100s banned in China.
  • Case fuels bipartisan pressure for automatic entity-listing of violators.

• Tool-waiver cliff for China fabs⁵¹² (trendforce.com, trendforce.com)

  • TrendForce says Commerce could revoke the 2022 “sustain-and-maintain” permits as early as July, threatening 30-35 % of Samsung’s NAND output in Xi’an.
  • TSMC warns investors of 2-pt gross-margin hit if revocation proceeds.

• Allied fabs in Beijing under review⁶ (bloomberg.com)

  • A Wall Street Journal leak—amplified by Bloomberg—suggests Washington is pressuring Seoul and Taipei to curtail legacy-node expansions in China.
  • Korean officials seek carve-outs for automotive MCUs.

• Continental’s fabless pivot to cut geopolitical risk⁷ (continental.com)

  • New Advanced Electronics & Semiconductor Solutions (AESS) group will co-develop auto-grade SoCs with GlobalFoundries.
  • Company cites software-defined-vehicle road-map and reliability of Western fabs as prime drivers.

2 | Economics, Finance & Business Outlook

• Wolfspeed restructuring² (ft.com)

  • Renesas converts a $2 billion loan to equity; unsecured noteholders take 95 % haircut.
  • CHIPS-Act grant of $750 million remains frozen, clouding U.S. SiC capacity plans.

• Montage Technology IPO¹⁰ (bloomberg.com)

  • Shanghai-born DDR-controller designer hires JPMorgan and CICC for a $1 billion Hong Kong float.
  • Proceeds earmarked for 3 nm high-bandwidth cache chips targeting AI servers.

• STMicro buybacks accelerate⁹ (globenewswire.com)

  • €92 million (≈$99 million) repurchased last week; CFO says move offsets dilution ahead of 300 mm Catania power-device ramp.

• Snowcap Compute seed round⁴ (reuters.com)

  • Playground Global leads; ex-Intel CEO Pat Gelsinger joins the board.
  • First superconducting inference chip slated for late 2026 tape-out, eyeing hyperscale data-center pilots.

3 | Technology & R & D

• ASML High-NA rethink³ (trendforce.com)

  • Intel process engineers now project <20 % of sub-2 nm layers will need 0.55 NA exposure, reducing the expected 30 % productivity gain to ~12 %.
  • Rival foundries eye aggressive multi-patterning instead.

• Quantum-assisted yield optimization⁸ (globenewswire.com)

  • SEALSQ, ColibriTD and Xdigit propose using hybrid quantum annealing to predict fatal hotspots pre-tape-out, claiming +3 % yield at 5 nm and below.
  • Initial pilot with a European logic fab expected Q4 2025.

• Nvidia tensor-core evolution analysis¹³ (semianalysis.com)

  • SemiAnalysis breakdown shows Blackwell’s asynchronous MMA engines doubling sparsity utilization, cutting LLM inference latency by ~1.8 ×.
  • Design leans on 5 Tb/s NVLink-C2C tiles, hinting at chiplet reuse in 2027 “Rubin.”

• Automotive OEMs go fabless (Continental AESS) ⁷ (continental.com)

  • Internal DSS-grade MCU family will start on GF’s 22 FDX+ for body control, moving to 12 LP+ FinFET for ADAS by 2027.
  • Continental targets 30 % BOM cost savings and tighter supply-chain control.

Footnotes (raw Markdown)